[RISCV] isLoadFromStackSlot and isStoreToStackSlot for vector spill/fill (#132296)

This is an adapted version of arsenm's
https://github.com/llvm/llvm-project/pull/120524.

The intention of the change is to enable dead stack slot copy
elimination in StackSlotColoring for vector loads and stores. In terms
of testing, see stack-slot-coloring.mir. This has little impact on in
tree tests otherwise.

This change has a different and smaller set of test diffs then then
@arsenm's patch because I'm using scalable sizes for the LMULs, not a
single signal value. His patch allowed vector load/store pairs of
different width to be deleted, mine does not. There's also simply been a
lot of churn in regalloc behavior on these particular tests recently, so
that may explain some of the diff as well.

0 files changed, 0 insertions, 0 deletions