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| author | Kazushi (Jam) Marukawa <marukawa@nec.com> | 2020-06-10 10:01:56 +0200 |
|---|---|---|
| committer | Simon Moll <simon.moll@emea.nec.com> | 2020-06-10 10:02:14 +0200 |
| commit | 49e4faa010e1fde152404c1f393a4e8d72f27792 (patch) | |
| tree | a8388c4d56c285b36d58b671b718e11e3eaa3194 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 6eb9eae0100f13ae2574bd74add915bec0078b4d (diff) | |
| download | llvm-49e4faa010e1fde152404c1f393a4e8d72f27792.zip llvm-49e4faa010e1fde152404c1f393a4e8d72f27792.tar.gz llvm-49e4faa010e1fde152404c1f393a4e8d72f27792.tar.bz2 | |
[VE] Support host memory access instructions in MC layer
Summary:
Add LHM/SHM instructions. Add regression tests for them of asmparser,
mccodeemitter, and disassembler. In order to add those instructions,
add new decode functions to disassembler, and add new print functions
to instprinter.
Differential Revision: https://reviews.llvm.org/D81535
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions