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| author | Graham Hunter <graham.hunter@arm.com> | 2025-01-20 12:57:05 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-20 12:57:05 +0000 |
| commit | d9f165ddea3223217a959c3cea3d2c613b132935 (patch) | |
| tree | ca1889ee8b108ecb7fcfe15348eaa763b2e82a81 /llvm/lib/Bitcode/Reader | |
| parent | 5ce271ef74dd3325993c827f496e460ced41af11 (diff) | |
| download | llvm-d9f165ddea3223217a959c3cea3d2c613b132935.zip llvm-d9f165ddea3223217a959c3cea3d2c613b132935.tar.gz llvm-d9f165ddea3223217a959c3cea3d2c613b132935.tar.bz2 | |
[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)
Based on feedback from the clastb codegen PR, I'm refactoring basic codegen for the vector.extract.last.active intrinsic to lower to an ISD node in SelectionDAGBuilder then expand in LegalizeVectorOps, instead of doing everything in the builder.
The new ISD node (vector_find_last_active) only covers finding the index of the last active element of the mask, and extracting the element + handling passthru is left to existing ISD nodes.
Diffstat (limited to 'llvm/lib/Bitcode/Reader')
0 files changed, 0 insertions, 0 deletions