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author | Alex Bradbury <asb@igalia.com> | 2025-07-21 11:48:33 +0100 |
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committer | GitHub <noreply@github.com> | 2025-07-21 11:48:33 +0100 |
commit | fc69f25a8f8c1bea9c7dbe1ce7597b3c0cafb122 (patch) | |
tree | 58474fefb255b04e0b2195a42ac819251447cdae /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | a11c5dd34b2cfa975934250b13628cac919fb7cb (diff) | |
download | llvm-fc69f25a8f8c1bea9c7dbe1ce7597b3c0cafb122.zip llvm-fc69f25a8f8c1bea9c7dbe1ce7597b3c0cafb122.tar.gz llvm-fc69f25a8f8c1bea9c7dbe1ce7597b3c0cafb122.tar.bz2 |
[RISCV] Convert LWU to LW if possible in RISCVOptWInstrs (#144703)
After the refactoring in #149710 the logic change is trivial.
Motivation for preferring sign-extended 32-bit loads (LW) vs
zero-extended (LWU):
* LW is compressible while LWU is not.
* Helps to minimise the diff vs RV32 (e.g. LWU vs LW)
* Helps to minimise distracting diffs vs GCC. I see this come up
frequently when comparing GCC code and in these cases it's a red
herring.
Similar normalisation could be done for LHU and LH, but this is less
well motivated as there is a compressed LHU (and if performing the
change in RISCVOptWInstrs it wouldn't be done for RV32). There is a
compressed LBU but not LB, meaning doing a similar normalisation for
byte-sized loads would actually be a regression in terms of code size.
Load narrowing when allowed by hasAllNBitUsers isn't explored in this
patch.
This changes ~20500 instructions in an RVA22 build of the
llvm-test-suite including SPEC 2017. As part of the review, the option
of doing the change at ISel time was explored but was found to be less
effective.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions