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author | Craig Topper <craig.topper@intel.com> | 2019-08-15 06:46:30 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-08-15 06:46:30 +0000 |
commit | 1e246b20c038d61153c7a77b8578a188d40938e2 (patch) | |
tree | 643ebea3b7d1e9525437a593ec0186f3d9cec5fe /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
parent | e6409602a1f9dd3204628ceb32f5b715877a0060 (diff) | |
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[X86] Add isel pattern to match VZEXT_MOVL and a v2i64 scalar_to_vector bitcasted from x86mmx to MOVQ2DQ.
We already had the pattern for just the scalar to vector and bitcast,
but not the case where we wanted zeroes in the high half of the xmm.
llvm-svn: 368972
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions