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author | Pierre van Houtryve <pierre.vanhoutryve@amd.com> | 2024-06-11 14:27:35 +0200 |
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committer | GitHub <noreply@github.com> | 2024-06-11 14:27:35 +0200 |
commit | d4b8b7217f31827f8536c9340b55ecb21e540621 (patch) | |
tree | a53993accd105c657bdacecf2640aaab6a503855 /llvm/docs/tutorial | |
parent | 546c816a529835a4cf89deecff957ea336a94fa2 (diff) | |
download | llvm-d4b8b7217f31827f8536c9340b55ecb21e540621.zip llvm-d4b8b7217f31827f8536c9340b55ecb21e540621.tar.gz llvm-d4b8b7217f31827f8536c9340b55ecb21e540621.tar.bz2 |
[CodeGen][MachineLICM] Use RegUnits in HoistRegionPostRA (#94608)
Those BitVectors get expensive on targets like AMDGPU with thousands of
registers, and RegAliasIterator is also expensive.
We can move all liveness calculations to use RegUnits instead to speed
it up for targets where RegAliasIterator is expensive, like AMDGPU.
On targets where RegAliasIterator is cheap, this alternative can be a little more expensive, but I believe the tradeoff is worth it.
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