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author | Austin Kerbow <Austin.Kerbow@amd.com> | 2025-03-24 10:38:47 -0700 |
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committer | GitHub <noreply@github.com> | 2025-03-24 10:38:47 -0700 |
commit | e75f586b813a081cffcafb8b5d34b5547e52e548 (patch) | |
tree | a889de8bce408330dc5c7c39eed6be41da64b3f0 /llvm/docs/CommandGuide | |
parent | 061b1d1149660d9de69e35d1ab1759480aa6885a (diff) | |
download | llvm-e75f586b813a081cffcafb8b5d34b5547e52e548.zip llvm-e75f586b813a081cffcafb8b5d34b5547e52e548.tar.gz llvm-e75f586b813a081cffcafb8b5d34b5547e52e548.tar.bz2 |
[AMDGPU] Relax lds dma waitcnt with no aliasing pair (#131842)
If we cannot find any lds DMA instruction that is aliased by some load
from lds, we will still insert vmcnt(0). This is overly cautious since
handling inter-thread dependences is normally managed by the memory
model instead of the waitcnt pass, so this change updates the behavior
to be more inline with how other types of memory events are handled.
Diffstat (limited to 'llvm/docs/CommandGuide')
0 files changed, 0 insertions, 0 deletions