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| author | yzhang93 <zhyuhang88@gmail.com> | 2023-06-26 14:18:15 -0700 |
|---|---|---|
| committer | Hanhan Wang <hanchung@google.com> | 2023-06-26 14:18:30 -0700 |
| commit | 5a1cdcbd8698cd263696b38e2672fccac9ec793c (patch) | |
| tree | 43531fcd8a3b29a3dff620bc3d0d22d363cb9ecf /llvm/docs/CommandGuide | |
| parent | 7827beeebb5948c9edaedd679d9d2c9ff30df6ed (diff) | |
| download | llvm-5a1cdcbd8698cd263696b38e2672fccac9ec793c.zip llvm-5a1cdcbd8698cd263696b38e2672fccac9ec793c.tar.gz llvm-5a1cdcbd8698cd263696b38e2672fccac9ec793c.tar.bz2 | |
[mlir] Narrow bitwidth emulation for MemRef load
This patch adds support for narrow bitwidth storage emulation. The goal is to support sub-byte type
codegen for LLVM CPU. Specifically, a type converter is added to convert memref of narrow bitwidth
(e.g., i4) into supported wider bitwidth (e.g., i8). Another focus of this patch is to populate the
pattern for int4 memref.load. memref.store pattern should be added in a seperate patch.
Reviewed By: hanchung, mravishankar
Differential Revision: https://reviews.llvm.org/D151519
Diffstat (limited to 'llvm/docs/CommandGuide')
0 files changed, 0 insertions, 0 deletions