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| author | Andrzej WarzyĆski <andrzej.warzynski@arm.com> | 2026-02-12 09:48:52 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-02-12 09:48:52 +0000 |
| commit | 22985fe1f9395e3d3d83879b82158a5cc4fe7759 (patch) | |
| tree | 04852e0ec96a89d9ef761e943a61ecbcb1a882ec /lldb/test/Shell/ScriptInterpreter/Python | |
| parent | d49060a72d3fcfea210b293dcbca008b74908614 (diff) | |
| download | llvm-22985fe1f9395e3d3d83879b82158a5cc4fe7759.zip llvm-22985fe1f9395e3d3d83879b82158a5cc4fe7759.tar.gz llvm-22985fe1f9395e3d3d83879b82158a5cc4fe7759.tar.bz2 | |
[clang][Builtins][ARM] NFC updates in ARM.cpp (#180966)
Updates the logic in `CodeGenFunction::EmitAArch64BuiltinExpr` so that
we always start with the general code and we only fall-back to
specialised cases (i.e. `switch` stmts) for intrinsics for which the
general code does no apply.
BEFORE (only high-level:
```cpp
Value *CodeGenFunction::EmitAArch64BuiltinExpr() {
(...)
/// 1. SWITCH STMT FOR NON-OVERLOADED INTRINSIS
switch (BuiltinID) {
default break:
case NEON::BI__builtin_neon_vabsh_f16:
(...)
}
/// 2. GENERAL CODE
Builtin = findARMVectorIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID,
AArch64SIMDIntrinsicsProvenSorted);
if (Builtin)
return EmitCommonNeonBuiltinExpr(
Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic,
Builtin->NameHint, Builtin->TypeModifier, E, Ops,
/*never use addresses*/ Address::invalid(), Address::invalid(), Arch);
if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch))
return V;
/// 3. SWITCH STMT FOR THE REMAINING INTRINSIS
switch (BuiltinID) {
default return nullptr:
case NEON::BI__builtin_neon_vbsl_v:
(...)
}
}
```
AFTER:
```cpp
Value *CodeGenFunction::EmitAArch64BuiltinExpr() {
/// 1. GENERAL CODE
Builtin = findARMVectorIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID,
AArch64SIMDIntrinsicsProvenSorted);
if (Builtin)
return EmitCommonNeonBuiltinExpr(
Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic,
Builtin->NameHint, Builtin->TypeModifier, E, Ops,
/*never use addresses*/ Address::invalid(), Address::invalid(), Arch);
if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch))
return V;
/// 2. SWITCH STMT FOR NON-OVERLOADED INTRINSIS
switch (BuiltinID) {
default break:
case NEON::BI__builtin_neon_vabsh_f16:
(...)
}
/// 3. SWITCH STMT FOR THE REMAINING INTRINSIS
switch (BuiltinID) {
default return nullptr:
case NEON::BI__builtin_neon_vbsl_v:
(...)
}
}
```
In addition:
* Remove `vaddq_p128+ vcvtq_high_bf16_f32 + vcvtq_low_bf16_f32` from
`AArch64SIMDIntrinsicMap`. Those were not required
there (it's an array for intrinsics for which the general code-gen
works, but that's not the case for those).
* Extracted the declaration of `Int` so that it can be re-used.
Diffstat (limited to 'lldb/test/Shell/ScriptInterpreter/Python')
0 files changed, 0 insertions, 0 deletions
