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| author | Jessica Clarke <jrtc27@jrtc27.com> | 2020-08-20 18:36:50 +0100 |
|---|---|---|
| committer | Jessica Clarke <jrtc27@jrtc27.com> | 2020-08-20 18:36:54 +0100 |
| commit | 3149ec07c0247397f7d963ccff28773a00bcdf9c (patch) | |
| tree | ade15ae9ebc2dec0e4df7a56c2bf945fc1462e47 /lldb/source/Interpreter/CommandObject.cpp | |
| parent | ea2e682cc2f85594fccd7450b5e5e15294e7bf3f (diff) | |
| download | llvm-3149ec07c0247397f7d963ccff28773a00bcdf9c.zip llvm-3149ec07c0247397f7d963ccff28773a00bcdf9c.tar.gz llvm-3149ec07c0247397f7d963ccff28773a00bcdf9c.tar.bz2 | |
[RISCV] Enable MCCodeEmitter instruction predicate verifier
This ensures that we never encode an instruction which is unavailable,
such as if we explicitly insert a forbidden instruction when lowering.
This is particularly important on RISC-V given its high degree of
modularity, and will become increasingly important as new standard
extensions appear.
Reviewed By: asb, lenary
Differential Revision: https://reviews.llvm.org/D85015
Diffstat (limited to 'lldb/source/Interpreter/CommandObject.cpp')
0 files changed, 0 insertions, 0 deletions