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| author | Jingu Kang <jingu.kang@arm.com> | 2021-10-15 23:25:23 +0100 |
|---|---|---|
| committer | Jingu Kang <jingu.kang@arm.com> | 2021-10-18 08:55:42 +0100 |
| commit | 3f0b178de21ee82791a6ebe198314f14c0287a44 (patch) | |
| tree | e4f0786c727267f557affad910384adbac20bfcf /lldb/source/Commands/CommandObjectThread.cpp | |
| parent | f383c533110664d41df51b08637df7243c4d6bf7 (diff) | |
| download | llvm-3f0b178de21ee82791a6ebe198314f14c0287a44.zip llvm-3f0b178de21ee82791a6ebe198314f14c0287a44.tar.gz llvm-3f0b178de21ee82791a6ebe198314f14c0287a44.tar.bz2 | |
[AArch64] Fixed a bug on AArch64MIPeepholeOpt
Create new virtual register for the definition of new AND instruction and
replace old register by the new one to keep SSA form.
Differential Revision: https://reviews.llvm.org/D109963
Diffstat (limited to 'lldb/source/Commands/CommandObjectThread.cpp')
0 files changed, 0 insertions, 0 deletions