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| author | Kristof Beyls <kristof.beyls@arm.com> | 2021-06-15 13:37:08 +0100 |
|---|---|---|
| committer | Kristof Beyls <kristof.beyls@arm.com> | 2021-06-17 07:45:06 +0100 |
| commit | 6f0e74cd583ba6fbb897d3ab16a9b75e91484275 (patch) | |
| tree | 8a9f8bdce322f6dce57a5152a999d9823650a62b /lldb/source/Commands/CommandObjectGUI.cpp | |
| parent | 3ed3e438a75d9cf756f6004b60dd5b3feec96b0b (diff) | |
| download | llvm-6f0e74cd583ba6fbb897d3ab16a9b75e91484275.zip llvm-6f0e74cd583ba6fbb897d3ab16a9b75e91484275.tar.gz llvm-6f0e74cd583ba6fbb897d3ab16a9b75e91484275.tar.bz2 | |
Avoid unnecessary AArch64 DSB in __clear_cache in some situations.
The dsb after instruction cache invalidation only needs to be executed
if any instruction cache invalidation did happen.
Without this change, if the CTR_EL0.DIC bit indicates that instruction
cache invalidation is not needed, __clear_cache would execute two dsb
instructions in a row; with the second one being unnecessary.
Differential Revision: https://reviews.llvm.org/D104371
Diffstat (limited to 'lldb/source/Commands/CommandObjectGUI.cpp')
0 files changed, 0 insertions, 0 deletions