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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-07-09 13:43:19 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-07-09 13:43:19 +0000 |
| commit | cfbb71dfb6464d9d442d6fc2fa0b76ded3981a53 (patch) | |
| tree | f0f0c304144f672b0c44889d4610783715083060 /lldb/source/Commands/CommandObjectCommands.cpp | |
| parent | 85bcadcdc6282c0e054c45d217e1ba64653e6a66 (diff) | |
| download | llvm-cfbb71dfb6464d9d442d6fc2fa0b76ded3981a53.zip llvm-cfbb71dfb6464d9d442d6fc2fa0b76ded3981a53.tar.gz llvm-cfbb71dfb6464d9d442d6fc2fa0b76ded3981a53.tar.bz2 | |
[mips] clz is defined to give 32 for zero. Similarly, dclz gives 64.
Summary:
While debugging another issue, I noticed that Mips currently specifies that the
count leading zero builtins are undefined when the input is zero. The
architecture specifications say that the clz and dclz instructions write 32 or
64 respectively when given zero.
This doesn't fix any bugs that I'm aware of but it may improve optimisation in
some cases.
Differential Revision: http://reviews.llvm.org/D4431
llvm-svn: 212618
Diffstat (limited to 'lldb/source/Commands/CommandObjectCommands.cpp')
0 files changed, 0 insertions, 0 deletions