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| author | Alexander Timofeev <alexander.timofeev@amd.com> | 2022-09-07 16:14:38 +0200 |
|---|---|---|
| committer | Alexander Timofeev <alexander.timofeev@amd.com> | 2022-09-19 23:31:45 +0200 |
| commit | 2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8 (patch) | |
| tree | 21ed3707da67003f350c1de72d2095b85a26a375 /lldb/source/Commands/CommandObjectCommands.cpp | |
| parent | 0cec96ab250e59e666d225a3b47ddd6289a82339 (diff) | |
| download | llvm-2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8.zip llvm-2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8.tar.gz llvm-2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8.tar.bz2 | |
[AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.
This change finalizes the series of patches aiming to replace the old strategy of VGPR to SGPR copy lowering.
# Following the https://reviews.llvm.org/D128252 and https://reviews.llvm.org/D130367 code parts that are no longer used were removed.
# The first pass over the MachineFunctoin collects all the necessary information.
# Lowering is done in 3 phases:
- VGPR to SGPR copies analysis lowering
- REG_SEQUENCE, PHIs, and SGPR to VGPR copies lowering
- SCC copies lowering is done in a separate pass over the Machine Function
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D131246
Diffstat (limited to 'lldb/source/Commands/CommandObjectCommands.cpp')
0 files changed, 0 insertions, 0 deletions