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authorCraig Topper <craig.topper@intel.com>2020-01-07 11:08:45 -0800
committerCraig Topper <craig.topper@intel.com>2020-01-07 11:22:03 -0800
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[X86] Improve lowering of v2i64 sign bit tests on pre-sse4.2 targets
Without sse4.2 a v2i64 setlt needs to expand into a pcmpgtd, pcmpeqd, 3 shuffles, and 2 logic ops. But if we're only interested in the sign bit of the i64 elements, we can just use one pcmpgtd and shuffle the odd elements to the even elements. Differential Revision: https://reviews.llvm.org/D72302
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