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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-07 13:32:03 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-07 16:36:31 -0500 |
| commit | 4844bf0fe2c83859cde322a2f952ac8337bdff05 (patch) | |
| tree | c7d3442f81254a5b13ffc731286f86eb8ef55a95 /lldb/scripts/Python/python-extensions.swig | |
| parent | 73d93617d3ae23bad232fa3a160c638728c71c01 (diff) | |
| download | llvm-4844bf0fe2c83859cde322a2f952ac8337bdff05.zip llvm-4844bf0fe2c83859cde322a2f952ac8337bdff05.tar.gz llvm-4844bf0fe2c83859cde322a2f952ac8337bdff05.tar.bz2 | |
AMDGPU: Apply i16 add->sub pattern with zext to i32
This was only applying the deeper nested zext pattern, and missing the
special case code size fold.
Diffstat (limited to 'lldb/scripts/Python/python-extensions.swig')
0 files changed, 0 insertions, 0 deletions