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| author | Momchil Velikov <momchil.velikov@arm.com> | 2025-01-27 16:45:40 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-27 16:45:40 +0000 |
| commit | 4e231014c1980d64812a0322223a4759798d1be3 (patch) | |
| tree | 604713322c984b64f533178446027928449b0910 /libcxx/src/algorithm.cpp | |
| parent | 2625510ef8094457413661ef0ce2651844f584d2 (diff) | |
| download | llvm-4e231014c1980d64812a0322223a4759798d1be3.zip llvm-4e231014c1980d64812a0322223a4759798d1be3.tar.gz llvm-4e231014c1980d64812a0322223a4759798d1be3.tar.bz2 | |
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (10/11) (#116836)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`RBIT`, `REVB`, `REVH`, `REVW`, and `REVD` instructions.
Diffstat (limited to 'libcxx/src/algorithm.cpp')
0 files changed, 0 insertions, 0 deletions