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| author | Piotr Sobczak <Piotr.Sobczak@amd.com> | 2021-02-10 17:21:15 +0100 |
|---|---|---|
| committer | Piotr Sobczak <Piotr.Sobczak@amd.com> | 2021-02-17 12:24:58 +0100 |
| commit | 08131c7439336e84b9df3e37b3aaeb76b8f60702 (patch) | |
| tree | 876924d82c0510f4ea56a277077beeb5b0922919 /libcxx/src/algorithm.cpp | |
| parent | d81161646a3d9a57750383f8e8b6c0b9abc7624b (diff) | |
| download | llvm-08131c7439336e84b9df3e37b3aaeb76b8f60702.zip llvm-08131c7439336e84b9df3e37b3aaeb76b8f60702.tar.gz llvm-08131c7439336e84b9df3e37b3aaeb76b8f60702.tar.bz2 | |
[AMDGPU] Fix a miscompile with S_ADD/S_SUB
The helper function isBoolSGPR is too aggressive when determining
when a v_cndmask can be skipped on a boolean value because the
function does not check the operands of and/or/xor.
This can be problematic for the Add/Sub combines that can leave
bits set even for inactive lanes leading to wrong results.
Fix this by inspecting the operands of and/or/xor recursively.
Differential Revision: https://reviews.llvm.org/D86878
Diffstat (limited to 'libcxx/src/algorithm.cpp')
0 files changed, 0 insertions, 0 deletions