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authorKrzysztof Drewniak <Krzysztof.Drewniak@amd.com>2026-02-04 08:39:44 -0800
committerGitHub <noreply@github.com>2026-02-04 08:39:44 -0800
commitc08b2c75dbc4aae897affa8d38108d779350e137 (patch)
tree6f24afb9e7a5a6dc974d5ef2538553acc2dfc11d /libc/test/integration/src/threads/mtx_test.cpp
parent10d80708d9705af3307c99c0824d1bd2e3f86fd7 (diff)
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[milr][gpu] Make barrier elimination address-space aware (#178101)HEADmain
Upgrade the barrier eliminiation pass to account for the address spaces of accessed memory when deciding which barriers to eliminiate. In particular, a loop that only reads and writes global memory that has a workgoup-memory-fencing barrier inside of it will now have that barrier marked for elimiination, as the global memory traffic is not being synchronized by the barrier. The pass is also adjusted to ignore barriers whose memory fencing list is [], as those do not synchronize memory and therefore the logic in this pass would potentially incorrectly remove them after proving that fact. --------- Co-authored-by: Jakub Kuderski <kubakuderski@gmail.com>
Diffstat (limited to 'libc/test/integration/src/threads/mtx_test.cpp')
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