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| author | Freddy Ye <freddy.ye@intel.com> | 2024-01-18 09:22:04 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-01-18 09:22:04 +0800 |
| commit | f3a4de395c167aeb8207294222c6ff5719ef6f62 (patch) | |
| tree | 193a7a1093e609ffe008fe4207e6614f96dc76d8 /compiler-rt | |
| parent | aa02002491333c42060373bc84f1ff5d2c76b4ce (diff) | |
| download | llvm-f3a4de395c167aeb8207294222c6ff5719ef6f62.zip llvm-f3a4de395c167aeb8207294222c6ff5719ef6f62.tar.gz llvm-f3a4de395c167aeb8207294222c6ff5719ef6f62.tar.bz2 | |
[X86] Support "f16c" and "avx512fp16" for __builtin_cpu_supports (#78384)
This resolves issue #65320.
This also supports clarify sapphirerapids and cooperlake for
cpu_specific/dispatch.
Diffstat (limited to 'compiler-rt')
| -rw-r--r-- | compiler-rt/lib/builtins/cpu_model/x86.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c index 9d9a5d3..0750e29 100644 --- a/compiler-rt/lib/builtins/cpu_model/x86.c +++ b/compiler-rt/lib/builtins/cpu_model/x86.c @@ -148,7 +148,8 @@ enum ProcessorFeatures { FEATURE_LZCNT, FEATURE_MOVBE, - FEATURE_X86_64_BASELINE = 95, + FEATURE_AVX512FP16 = 94, + FEATURE_X86_64_BASELINE, FEATURE_X86_64_V2, FEATURE_X86_64_V3, FEATURE_X86_64_V4, @@ -812,6 +813,8 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf, setFeature(FEATURE_AVX5124FMAPS); if (HasLeaf7 && ((EDX >> 8) & 1) && HasAVX512Save) setFeature(FEATURE_AVX512VP2INTERSECT); + if (HasLeaf7 && ((EDX >> 23) & 1) && HasAVX512Save) + setFeature(FEATURE_AVX512FP16); // EAX from subleaf 0 is the maximum subleaf supported. Some CPUs don't // return all 0s for invalid subleaves so check the limit. |