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authorShihPo Hung <shihpo.hung@sifive.com>2021-04-11 19:34:10 -0700
committerShihPo Hung <shihpo.hung@sifive.com>2021-04-13 18:55:51 -0700
commitd5e962f1f20c3e441b36785c572432000c80a728 (patch)
tree327f74760a3949f4c4e9e3bf7fea71b984164c5e /clang/unittests/Frontend/CompilerInvocationTest.cpp
parent5c500c9f01aacc0d921db99681c3dc9c4078938c (diff)
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[RISCV] Implement COPY for Zvlsseg registers
When copying Zvlsseg register tuples, we split the COPY to NF whole register moves as below: $v10m2_v12m2 = COPY $v4m2_v6m2 # NF = 2 => $v10m2 = PseudoVMV2R_V $v4m2 $v12m2 = PseudoVMV2R_V $v6m2 This patch copies forwardCopyWillClobberTuple from AArch64 to check register overlapping. Reviewed By: frasercrmck Differential Revision: https://reviews.llvm.org/D100280
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