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| author | Stefan Pintilie <stefanp@ca.ibm.com> | 2021-01-05 14:42:53 -0600 |
|---|---|---|
| committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2021-01-06 05:56:09 -0600 |
| commit | cb0c034edc98b32691ea25b70fc3cc2e9d6d2a86 (patch) | |
| tree | 8cd66dcdc5a988c29ac9299a46e28cc703579aba /clang/unittests/Frontend/CompilerInvocationTest.cpp | |
| parent | 816dba48af49050625adec6ed696983618346b11 (diff) | |
| download | llvm-cb0c034edc98b32691ea25b70fc3cc2e9d6d2a86.zip llvm-cb0c034edc98b32691ea25b70fc3cc2e9d6d2a86.tar.gz llvm-cb0c034edc98b32691ea25b70fc3cc2e9d6d2a86.tar.bz2 | |
[PowerPC] Fix issue where vsrq is given incorrect shift vector
The new Power10 instruction vsrq was being given the wrong shift vector.
The original code assumed that the shift would be found in bits 121 to 127.
This is not correct. The shift is found in bits 57 to 63.
This can be fixed by swaping the first and second double words.
Reviewed By: nemanjai, #powerpc
Differential Revision: https://reviews.llvm.org/D94113
Diffstat (limited to 'clang/unittests/Frontend/CompilerInvocationTest.cpp')
0 files changed, 0 insertions, 0 deletions