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author | Min-Yih Hsu <min.hsu@sifive.com> | 2024-11-12 15:29:40 -0800 |
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committer | GitHub <noreply@github.com> | 2024-11-12 15:29:40 -0800 |
commit | 84e95beae980466ffcc555297e0e34d23fca8a76 (patch) | |
tree | d6e46e1ab3381834212623b35eb07647ae2d2dbc /clang/unittests/Frontend/CompilerInvocationTest.cpp | |
parent | 7b5e285d16090c2ddf4ee539c410d24bde52cbea (diff) | |
download | llvm-84e95beae980466ffcc555297e0e34d23fca8a76.zip llvm-84e95beae980466ffcc555297e0e34d23fca8a76.tar.gz llvm-84e95beae980466ffcc555297e0e34d23fca8a76.tar.bz2 |
[RISCV] Update SiFive P600's scheduling model on RVV instructions (#115243)
The biggest change is assigning vector crypto instructions to the
correct processor resource.
The majority of these changes are guided by our RVV-capable
llvm-exegesis.
Diffstat (limited to 'clang/unittests/Frontend/CompilerInvocationTest.cpp')
0 files changed, 0 insertions, 0 deletions