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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2021-04-13 19:40:36 -0500 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2021-04-13 19:52:21 -0500 |
| commit | 0148bf53f0a0b533eb742a7c8005a40328c48d66 (patch) | |
| tree | 329de2afc618c90c2629c5bab06b322428b9e5ad /clang/unittests/Frontend/CompilerInvocationTest.cpp | |
| parent | 32e264921b7a683a0bf797c91c60344c8500aac2 (diff) | |
| download | llvm-0148bf53f0a0b533eb742a7c8005a40328c48d66.zip llvm-0148bf53f0a0b533eb742a7c8005a40328c48d66.tar.gz llvm-0148bf53f0a0b533eb742a7c8005a40328c48d66.tar.bz2 | |
[PowerPC] Use correct node to get a super register from a subreg
The VSX tablegen file has some rather eggregious uses of
COPY_TO_REGCLASS even in situations where it needs to use
SUBREG_TO_REG. While this produces correct code, it often doesn't
allow the register coalescer to coalesce copies and the resulting
code ends up being suboptimal. This patch just changes over
patterns that should use SUBREG_TO_REG.
Diffstat (limited to 'clang/unittests/Frontend/CompilerInvocationTest.cpp')
0 files changed, 0 insertions, 0 deletions