diff options
| author | Andres-Salamanca <andrealebarbaritos@gmail.com> | 2025-08-02 09:39:51 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-02 09:39:51 -0500 |
| commit | 7e9927127f47c9576f273329a7f7dcc718ad622b (patch) | |
| tree | a5e8e25eda323dd757703644d68f17f450655045 /clang/tools/include-mapping/cppreference_parser.py | |
| parent | fc712aa9a6e843baa658aed4cb6d1cd5249d7b46 (diff) | |
| download | llvm-7e9927127f47c9576f273329a7f7dcc718ad622b.zip llvm-7e9927127f47c9576f273329a7f7dcc718ad622b.tar.gz llvm-7e9927127f47c9576f273329a7f7dcc718ad622b.tar.bz2 | |
[CIR] Fix outdated bitfield iteration logic in accumulateFields (#151741)
This PR fixes the outdated logic for accumulating bitfields in
`accumulateFields`. The old approach remained after the algorithm was
updated. A non-bitfield member would act as a barrier, causing
`accumulateBitFields` to receive an incomplete range of fields. As a
result, it failed to accumulate them properly when clipping was
necessary.
For reference, in ClangIR we already handle this correctly:
[https://github.com/llvm/clangir/blob/b647f4b97b1f936fd7700ec0fd0d896a12fe581b/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp#L711-L714](https://github.com/llvm/clangir/blob/b647f4b97b1f936fd7700ec0fd0d896a12fe581b/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp#L711-L714)
Diffstat (limited to 'clang/tools/include-mapping/cppreference_parser.py')
0 files changed, 0 insertions, 0 deletions