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| author | YixingZhang007 <yixing.zhang@intel.com> | 2025-08-01 15:20:32 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-01 15:20:32 -0400 |
| commit | b63a9b7a3cdc1e41545df595215077e50bfd04af (patch) | |
| tree | 580dcc6e3c5a093241702d0ab11d967d7fa5afd0 /clang/test/CodeGenCUDA/correctly-rounded-div.cu | |
| parent | 0b37de296833f2bd860d735b671f0612f3c194a4 (diff) | |
| download | llvm-main.zip llvm-main.tar.gz llvm-main.tar.bz2 | |
This PR provides the support for the capability
`TensorFloat32RoundingINTEL` and the instruction `OpRoundFToTF32INTE`L,
as specified by the `SPV_INTEL_tensor_float32_conversion` extension.
This extension introduces a rounding instruction that converts standard
32-bit floating-point values to the TensorFloat32 (TF32) format.
Reference Specification:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_tensor_float32_conversion.asciidoc
Diffstat (limited to 'clang/test/CodeGenCUDA/correctly-rounded-div.cu')
0 files changed, 0 insertions, 0 deletions