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| author | eleviant <56861949+eleviant@users.noreply.github.com> | 2025-07-24 19:19:25 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-24 19:19:25 +0200 |
| commit | a4796b14fcf3bf2749dcb90b5c870140f1a82f78 (patch) | |
| tree | 25ddb8c058d5dc5271798ccef047a275e2200516 /clang/test/AST/ast-print-openacc-wait-construct.cpp | |
| parent | 0f2c31dc92ac54df16c6c0b70028b1bfc37b2b69 (diff) | |
| download | llvm-a4796b14fcf3bf2749dcb90b5c870140f1a82f78.zip llvm-a4796b14fcf3bf2749dcb90b5c870140f1a82f78.tar.gz llvm-a4796b14fcf3bf2749dcb90b5c870140f1a82f78.tar.bz2 | |
[ARM] Emit error message when incompatible reg is specified (#147559)
At the moment the following piece of code causes undefined behavior:
```
int a;
void b() {
register float d2 asm("d2") = a;
asm("" ::"r"(d2));
}
```
This happens because variable and register types are incompatible.
Diffstat (limited to 'clang/test/AST/ast-print-openacc-wait-construct.cpp')
0 files changed, 0 insertions, 0 deletions