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| author | Simon Atanasyan <simon@atanasyan.com> | 2014-07-04 12:36:56 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2014-07-04 12:36:56 +0000 |
| commit | 26610c596002cb74294dae275ddf790655e83cee (patch) | |
| tree | 0edd6b9a4132e057e12ba1040f66589605e23bd8 /clang/lib | |
| parent | 3c5b12623952a50d25b9ab9fe14ab5c59bb7b35b (diff) | |
| download | llvm-26610c596002cb74294dae275ddf790655e83cee.zip llvm-26610c596002cb74294dae275ddf790655e83cee.tar.gz llvm-26610c596002cb74294dae275ddf790655e83cee.tar.bz2 | |
[Driver][Mips] Support more MIPS CPU names: mips1 - mips5.
llvm-svn: 212338
Diffstat (limited to 'clang/lib')
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 81a0003..9e3686b 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -5309,6 +5309,11 @@ public: getTriple().getArch() == llvm::Triple::mipsel; CPU = Name; return llvm::StringSwitch<bool>(Name) + .Case("mips1", IsMips32) + .Case("mips2", IsMips32) + .Case("mips3", true) + .Case("mips4", true) + .Case("mips5", true) .Case("mips32", IsMips32) .Case("mips32r2", IsMips32) .Case("mips32r6", IsMips32) |