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author | Peter Waller <peter.waller@arm.com> | 2020-12-10 12:34:00 +0000 |
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committer | Peter Waller <peter.waller@arm.com> | 2020-12-10 12:43:14 +0000 |
commit | 2315e9874c92bf625ec84a5f45a4fa28bfbc16ce (patch) | |
tree | 6f91a22b3cbd2deaaa9598f43656d8c433dd883a /clang/lib | |
parent | 208e3f5d9b6c172f65dbb9cdbc9354c81c6d8911 (diff) | |
download | llvm-2315e9874c92bf625ec84a5f45a4fa28bfbc16ce.zip llvm-2315e9874c92bf625ec84a5f45a4fa28bfbc16ce.tar.gz llvm-2315e9874c92bf625ec84a5f45a4fa28bfbc16ce.tar.bz2 |
[AArch64][Driver][SVE] Push missing SVE feature error from driver to frontend
... and give more guidance to users.
If specifying -msve-vector-bits on a non-SVE target, clang would say:
error: '-msve-vector-bits' is not supported without SVE enabled
1. The driver lacks logic for "implied features".
This would result in this error being raised for -march=...+sve2,
even though +sve2 implies +sve.
2. Feature implication is well modelled in LLVM, so push the error down
the stack.
3. Hint to the user what flag they need to consider setting.
Now clang fails later, when the feature is used, saying:
aarch64-sve-vector-bits.c:42:41: error: 'arm_sve_vector_bits' attribute is not supported on targets missing 'sve'; specify an appropriate -march= or -mcpu=
typedef svint32_t noflag __attribute__((arm_sve_vector_bits(256)));
Move clang/test/Sema/{neon => arm}-vector-types-support.c and put tests for
this warning together in one place.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D92487
Diffstat (limited to 'clang/lib')
-rw-r--r-- | clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 6 | ||||
-rw-r--r-- | clang/lib/Sema/SemaType.cpp | 5 |
2 files changed, 3 insertions, 8 deletions
diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp index 0fc531b..fca6d95 100644 --- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp +++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp @@ -381,12 +381,6 @@ fp16_fml_fallthrough: if (V8_6Pos != std::end(Features)) V8_6Pos = Features.insert(std::next(V8_6Pos), {"+i8mm", "+bf16"}); - bool HasSve = llvm::is_contained(Features, "+sve"); - // -msve-vector-bits=<bits> flag is valid only if SVE is enabled. - if (Args.hasArg(options::OPT_msve_vector_bits_EQ)) - if (!HasSve) - D.Diag(diag::err_drv_invalid_sve_vector_bits); - if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access, options::OPT_munaligned_access)) { if (A->getOption().matches(options::OPT_mno_unaligned_access)) diff --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp index fbdbfbc..6485beb 100644 --- a/clang/lib/Sema/SemaType.cpp +++ b/clang/lib/Sema/SemaType.cpp @@ -7799,7 +7799,8 @@ static void HandleNeonVectorTypeAttr(QualType &CurType, const ParsedAttr &Attr, // not to need a separate attribute) if (!S.Context.getTargetInfo().hasFeature("neon") && !S.Context.getTargetInfo().hasFeature("mve")) { - S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr; + S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) + << Attr << "'neon' or 'mve'"; Attr.setInvalid(); return; } @@ -7842,7 +7843,7 @@ static void HandleArmSveVectorBitsTypeAttr(QualType &CurType, ParsedAttr &Attr, Sema &S) { // Target must have SVE. if (!S.Context.getTargetInfo().hasFeature("sve")) { - S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr; + S.Diag(Attr.getLoc(), diag::err_attribute_unsupported) << Attr << "'sve'"; Attr.setInvalid(); return; } |