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| author | Matthias Braun <matze@braunis.de> | 2025-03-14 10:47:56 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-14 10:47:56 -0700 |
| commit | e6382f2111353f5af66bb660c2e0317c21c398ed (patch) | |
| tree | b9b30a8194c5c240755955e8b0aacbd7c1caa3d6 /clang/lib/Serialization/ModuleManager.cpp | |
| parent | 3fcd921aa492840f5a14fe29bdb10a55032af0d0 (diff) | |
| download | llvm-e6382f2111353f5af66bb660c2e0317c21c398ed.zip llvm-e6382f2111353f5af66bb660c2e0317c21c398ed.tar.gz llvm-e6382f2111353f5af66bb660c2e0317c21c398ed.tar.bz2 | |
SelectionDAG: neg (and x, 1) --> SIGN_EXTEND_INREG x, i1 (#131239)
The pattern
```LLVM
%shl = shl i32 %x, 31
%ashr = ashr i32 %shl, 31
```
would be combined to `SIGN_EXTEND_INREG %x, ValueType:ch:i1` by
SelectionDAG.
However InstCombine normalizes this pattern to:
```LLVM
%and = and i32 %x, 1
%neg = sub i32 0, %and
```
This adds matching code to DAGCombiner to catch this variant as well.
Diffstat (limited to 'clang/lib/Serialization/ModuleManager.cpp')
0 files changed, 0 insertions, 0 deletions