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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2025-01-20 19:23:18 +0100 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2025-01-20 19:30:21 +0100 |
commit | 8424bf207efd89eacf2fe893b67be98d535e1db6 (patch) | |
tree | 30c9e4debd2c24aa128899f45c96fec78f2a7eff /clang/lib/Sema/DeclSpec.cpp | |
parent | 64edde6648cc772c299dc4b39bb2ae7e4e294127 (diff) | |
download | llvm-8424bf207efd89eacf2fe893b67be98d535e1db6.zip llvm-8424bf207efd89eacf2fe893b67be98d535e1db6.tar.gz llvm-8424bf207efd89eacf2fe893b67be98d535e1db6.tar.bz2 |
[SystemZ] Add support for new cpu architecture - arch15
This patch adds support for the next-generation arch15
CPU architecture to the SystemZ backend.
This includes:
- Basic support for the new processor and its features.
- Detection of arch15 as host processor.
- Assembler/disassembler support for new instructions.
- Exploitation of new instructions for code generation.
- New vector (signed|unsigned|bool) __int128 data types.
- New LLVM intrinsics for certain new instructions.
- Support for low-level builtins mapped to new LLVM intrinsics.
- New high-level intrinsics in vecintrin.h.
- Indicate support by defining __VEC__ == 10305.
Note: No currently available Z system supports the arch15
architecture. Once new systems become available, the
official system name will be added as supported -march name.
Diffstat (limited to 'clang/lib/Sema/DeclSpec.cpp')
-rw-r--r-- | clang/lib/Sema/DeclSpec.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/clang/lib/Sema/DeclSpec.cpp b/clang/lib/Sema/DeclSpec.cpp index 4764468..95e14ca 100644 --- a/clang/lib/Sema/DeclSpec.cpp +++ b/clang/lib/Sema/DeclSpec.cpp @@ -1201,9 +1201,10 @@ void DeclSpec::Finish(Sema &S, const PrintingPolicy &Policy) { !S.getLangOpts().ZVector) S.Diag(TSWRange.getBegin(), diag::err_invalid_vector_long_long_decl_spec); - // No vector __int128 prior to Power8. + // No vector __int128 prior to Power8 (or ZVector). if ((TypeSpecType == TST_int128) && - !S.Context.getTargetInfo().hasFeature("power8-vector")) + !S.Context.getTargetInfo().hasFeature("power8-vector") && + !S.getLangOpts().ZVector) S.Diag(TSTLoc, diag::err_invalid_vector_int128_decl_spec); // Complex vector types are not supported. @@ -1225,9 +1226,10 @@ void DeclSpec::Finish(Sema &S, const PrintingPolicy &Policy) { << (TypeAltiVecPixel ? "__pixel" : getSpecifierName((TST)TypeSpecType, Policy)); } - // vector bool __int128 requires Power10. + // vector bool __int128 requires Power10 (or ZVector). if ((TypeSpecType == TST_int128) && - (!S.Context.getTargetInfo().hasFeature("power10-vector"))) + (!S.Context.getTargetInfo().hasFeature("power10-vector") && + !S.getLangOpts().ZVector)) S.Diag(TSTLoc, diag::err_invalid_vector_bool_int128_decl_spec); // Only 'short' and 'long long' are valid with vector bool. (PIM 2.1) |