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authorLuke Lau <luke@igalia.com>2025-05-28 10:57:08 +0100
committerGitHub <noreply@github.com>2025-05-28 10:57:08 +0100
commit9262e37d8c2d77fd86a1b4c183ac3ab6fe076d30 (patch)
tree1de7c538a940bd680e84fee882658f56945240e6 /clang/lib/Lex/ModuleMapFile.cpp
parent2e7489c8c82c4c0d1a28ae1725b0701b1af2413a (diff)
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[InstCombine] Fold shuffled intrinsic operands with constant operands (#141300)
We currently pull shuffles through binops and intrinsics, which is an important canonical form for VectorCombine to be able to scalarize vector sequences. But while binops can be folded with a constant operand, intrinsics currently require all operands to be shufflevectors. This extends intrinsic folding to be in line with regular binops by reusing the constant "unshuffling" logic. As far as I can tell the list of currently folded intrinsics don't require any special UB handling. This change in combination with #138095 and #137823 fixes the following C: ```c void max(int *x, int *y, int n) { for (int i = 0; i < n; i++) x[i] += *y > 42 ? *y : 42; } ``` Not using the splatted vector form on RISC-V with `-O3 -march=rva23u64`: ```asm vmv.s.x v8, a4 li a4, 42 vmax.vx v10, v8, a4 vrgather.vi v8, v10, 0 .LBB0_9: # %vector.body # =>This Inner Loop Header: Depth=1 vl2re32.v v10, (a5) vadd.vv v10, v10, v8 vs2r.v v10, (a5) ``` i.e., it now generates ```asm li a6, 42 max a6, a4, a6 .LBB0_9: # %vector.body # =>This Inner Loop Header: Depth=1 vl2re32.v v8, (a5) vadd.vx v8, v8, a6 vs2r.v v8, (a5) ```
Diffstat (limited to 'clang/lib/Lex/ModuleMapFile.cpp')
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