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| author | Nicholas Guy <nicholas.guy@arm.com> | 2025-05-28 10:47:41 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-05-28 10:47:41 +0100 |
| commit | 26bae798f27b17fe74a7c9c4f7abc489d44696d6 (patch) | |
| tree | 99f25daa2a28c5442ffd4f3736e1793cef0c4bbc /clang/lib/Lex/ModuleMapFile.cpp | |
| parent | dc6aac5e3cda76c17295bebee6808b413c1051a2 (diff) | |
| download | llvm-26bae798f27b17fe74a7c9c4f7abc489d44696d6.zip llvm-26bae798f27b17fe74a7c9c4f7abc489d44696d6.tar.gz llvm-26bae798f27b17fe74a7c9c4f7abc489d44696d6.tar.bz2 | |
[SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (#140075)
Lowering for fixed width vectors added to tablegen.
There is also custom lowering to ensure that the USDOT patterns are
still lowered for fixed width vectors. It also ensures that the
v16i8 -> v4i64 partial reduction case is lowered here instead of
being split (as there is not a v2i64 dot product instruction).
@JamesChesterman is the original author.
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Co-authored-by: James Chesterman <james.chesterman@arm.com>
Diffstat (limited to 'clang/lib/Lex/ModuleMapFile.cpp')
0 files changed, 0 insertions, 0 deletions