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| author | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2022-09-23 15:13:09 +0530 |
|---|---|---|
| committer | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2022-12-17 11:51:43 +0530 |
| commit | 7a72a93580147c239ae9eb8a8b2c0e3cd38d5322 (patch) | |
| tree | cb0936a1fe42fb74267ebe916ba5d10e5c964426 /clang/lib/Lex/ModuleMap.cpp | |
| parent | 20a940f1e217b0df031e656b2811be02b15eb14e (diff) | |
| download | llvm-7a72a93580147c239ae9eb8a8b2c0e3cd38d5322.zip llvm-7a72a93580147c239ae9eb8a8b2c0e3cd38d5322.tar.gz llvm-7a72a93580147c239ae9eb8a8b2c0e3cd38d5322.tar.bz2 | |
[AMDGPU] Preserve only the inactive lanes of scratch vgprs
In general, a callee is free to use a scratch register without
preserving its previous state. However, the VGPR used for SGPR
spilling can potentially have its inactive lanes overwritten by
the writelane instructions. When the function returns, it can
cause unexpected behavior if the VGPR value is not preserved
appropriately.
The current scheme to preserve the inactive lanes of such
scratch VGPRs is not done rightly. It preserves all lanes
and causes the outgoing values (if any) getting overwritten
by the epilog restores. It then corrupts the return value.
To avoid such situation with scratch VGPRs, this patch ensures
we preserve only their inactive lanes.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D134526
Diffstat (limited to 'clang/lib/Lex/ModuleMap.cpp')
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