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| author | Victor Campos <Victor.Campos@arm.com> | 2020-01-02 11:00:14 +0000 |
|---|---|---|
| committer | Victor Campos <Victor.Campos@arm.com> | 2020-01-07 13:16:18 +0000 |
| commit | 60e0120c913dd1d4bfe33769e1f000a076249a42 (patch) | |
| tree | 215eedacfa5fd327c7c36056512f7cf0a89cc4b6 /clang/lib/Frontend | |
| parent | 6ff1ea3244c543ad24fc99c7f4979db2f2078593 (diff) | |
| download | llvm-60e0120c913dd1d4bfe33769e1f000a076249a42.zip llvm-60e0120c913dd1d4bfe33769e1f000a076249a42.tar.gz llvm-60e0120c913dd1d4bfe33769e1f000a076249a42.tar.bz2 | |
[ARM] Improve codegen of volatile load/store of i64
Summary:
Instead of generating two i32 instructions for each load or store of a volatile
i64 value (two LDRs or STRs), now emit LDRD/STRD.
These improvements cover architectures implementing ARMv5TE or Thumb-2.
Reviewers: dmgreen, efriedma, john.brawn, nickdesaulniers
Reviewed By: efriedma, nickdesaulniers
Subscribers: nickdesaulniers, vvereschaka, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70072
Diffstat (limited to 'clang/lib/Frontend')
0 files changed, 0 insertions, 0 deletions