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| author | Craig Topper <craig.topper@sifive.com> | 2023-01-18 11:38:38 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-01-18 11:38:39 -0800 |
| commit | 97cb6191173ea4de67e7c5a2f0dbfe61109a5c71 (patch) | |
| tree | d52aa644f1df1e1ad02912ec1212090612416af5 /clang/lib/Frontend/TestModuleFileExtension.cpp | |
| parent | 82fa51f74dc71a541c5176ecf7f252713319c809 (diff) | |
| download | llvm-97cb6191173ea4de67e7c5a2f0dbfe61109a5c71.zip llvm-97cb6191173ea4de67e7c5a2f0dbfe61109a5c71.tar.gz llvm-97cb6191173ea4de67e7c5a2f0dbfe61109a5c71.tar.bz2 | |
[RISCV] Use canonical move instruction in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.
We were using an OR with X0 which is the canonical move for AArch64.
The canonical move for RISC-V is ADDI reg1, reg2, 0.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D142044
Diffstat (limited to 'clang/lib/Frontend/TestModuleFileExtension.cpp')
0 files changed, 0 insertions, 0 deletions