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author | OverMighty <its.overmighty@gmail.com> | 2022-08-17 12:00:47 +0100 |
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committer | David Green <david.green@arm.com> | 2022-08-17 12:00:47 +0100 |
commit | 232953f9962d901b6da16cf8c93ed7e2279d4804 (patch) | |
tree | 32db7537ff5e3c37e40424ae236e40d012928935 /clang/lib/Frontend/TestModuleFileExtension.cpp | |
parent | d9993484ee40abaab6d9e96872d3a29044202aea (diff) | |
download | llvm-232953f9962d901b6da16cf8c93ed7e2279d4804.zip llvm-232953f9962d901b6da16cf8c93ed7e2279d4804.tar.gz llvm-232953f9962d901b6da16cf8c93ed7e2279d4804.tar.bz2 |
[AArch64] Add pattern for SQDML*Lv1i32_indexed
There was no pattern to fold into these instructions. This patch adds
the pattern obtained from the following ACLE intrinsics so that they
generate sqdmlal/sqdmlsl instructions instead of separate sqdmull and
sqadd/sqsub instructions:
- vqdmlalh_s16, vqdmlslh_s16
- vqdmlalh_lane_s16, vqdmlalh_laneq_s16, vqdmlslh_lane_s16,
vqdmlslh_laneq_s16 (when the lane index is 0)
It also modifies the result of the existing pattern for the latter, when
the lane index is not 0, to use the v1i32_indexed instructions instead
of the v4i16_indexed ones.
Fixes #49997.
Differential Revision: https://reviews.llvm.org/D131700
Diffstat (limited to 'clang/lib/Frontend/TestModuleFileExtension.cpp')
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