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authorSudharsan Veeravalli <quic_svs@quicinc.com>2025-07-16 00:31:33 +0530
committerGitHub <noreply@github.com>2025-07-15 12:01:33 -0700
commitd67d91a9906366585162cebf292f923a3f28c8a6 (patch)
treeb64c4ec8bea206656bfa4c54614e4f1572d2d8e5 /clang/lib/Frontend/CompilerInvocation.cpp
parent8917f84d293c2fa6b77536d7053b5c41f4e785b8 (diff)
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[RISCV] Fix issues in ORI to QC.INSBI transformation (#148809)
The transformation done in #147349 was incorrect since we were not passing the input node of the `OR` instruction to the `QC.INSBI` instruction leading to the generated instruction doing the wrong thing. In order to do this we first needed to add the output register to `QC.INSBI` as being both an input and output. The code produced after the above fix will need a copy (mv) to preserve the register input to the OR instruction if it has more than one use making the transformation net neutral ( `6-byte QC.E.ORI/ORAI` vs `2-byte C.MV + 4-byte QC.INSB`I). Avoid doing the transformation if there is more than one use of the input register to the OR instruction.
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
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