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| author | David Green <david.green@arm.com> | 2023-02-08 13:17:10 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2023-02-08 13:17:10 +0000 |
| commit | b134c62facef01dabf901ee6a6283e3b0fb3a249 (patch) | |
| tree | 6d77f49120c1c79e32f16f465612cc438ffec843 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 22d98280dd8ee70064899eefb973a1c020605874 (diff) | |
| download | llvm-b134c62facef01dabf901ee6a6283e3b0fb3a249.zip llvm-b134c62facef01dabf901ee6a6283e3b0fb3a249.tar.gz llvm-b134c62facef01dabf901ee6a6283e3b0fb3a249.tar.bz2 | |
[AArch64] Fix creation of invalid instructions with XZR register
A combination of GlobalISel and MachineCombiner can end up creating
`SUB xrz, (MOVI -2105098)` instructions which have not been constant
folded. The AArch64MIPeepholeOpt pass will then attempt to create
`ADD xzr, 513, lsl 12`, which is not a valid instruction. This adds
a bail out of the transform if the register is xzr/wzr.
Fixes #60528
Differential Revision: https://reviews.llvm.org/D143475
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions