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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2024-05-09 13:15:01 +0100 |
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committer | GitHub <noreply@github.com> | 2024-05-09 13:15:01 +0100 |
commit | 8b400de79eff2a4fb95f06b6e4d167e65abbf448 (patch) | |
tree | 8e831d776c270de72e56296c8d02a984b71b1d8f /clang/lib/Frontend/CompilerInvocation.cpp | |
parent | e0d8dbc1dc203983243860c1fcc4698f60de37c0 (diff) | |
download | llvm-8b400de79eff2a4fb95f06b6e4d167e65abbf448.zip llvm-8b400de79eff2a4fb95f06b6e4d167e65abbf448.tar.gz llvm-8b400de79eff2a4fb95f06b6e4d167e65abbf448.tar.bz2 |
[X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (#91277)
Despite most AMD cpus having a lower latency for i64 divisions that converge early, we are still better off testing for values representable as i32 and performing a i32 division if possible.
All AMD cpus appear to have been missed when we added the "idivq-to-divl" attribute - this patch now matches Intel cpu behaviour (and the x86-64/v2/3/4 levels).
Unfortunately the difference in code scheduling means I've had to stop using the update_llc_test_checks script and just use old-fashioned CHECK-DAG checks for divl/divq pairs.
Fixes #90985
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
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