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| author | Simon Tatham <simon.tatham@arm.com> | 2022-04-05 11:09:51 +0100 |
|---|---|---|
| committer | Simon Tatham <simon.tatham@arm.com> | 2022-04-05 11:09:56 +0100 |
| commit | 82bd0bd24f61c914f1812646b281c1d0960df0bf (patch) | |
| tree | b01d0706e4ce0b1d48cd9ea1985818fc2a8d3b02 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 4d8a74c460eb9ec46f913375c92fa8c2359ddc22 (diff) | |
| download | llvm-82bd0bd24f61c914f1812646b281c1d0960df0bf.zip llvm-82bd0bd24f61c914f1812646b281c1d0960df0bf.tar.gz llvm-82bd0bd24f61c914f1812646b281c1d0960df0bf.tar.bz2 | |
[AArch64] Make PMMIR_EL1 read-only.
The Arm architecture reference manual (ARM DDI 0487H.a section
D13.5.12) lists every field in the register as RO, and does not list
an MSR instruction that writes it. So we should be defining it as an
ROSysReg, not an RWSysReg.
Reviewed By: vhscampos
Differential Revision: https://reviews.llvm.org/D123111
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions