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authorDinar Temirbulatov <Dinar.Temirbulatov@arm.com>2024-04-19 10:48:27 +0100
committerGitHub <noreply@github.com>2024-04-19 10:48:27 +0100
commit6f26867cfa4c1333e69a17f8a2fc8297a4ab6d45 (patch)
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[AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for add/sub. (#88413)
Allow to fold or/and-and to BSL instuction for scalable vectors.
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