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author | Craig Topper <craig.topper@intel.com> | 2020-07-16 22:04:24 -0700 |
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committer | Craig Topper <craig.topper@intel.com> | 2020-07-16 22:04:29 -0700 |
commit | 6bba95831e480656124a5fbcd84f4f2a31e6c0b6 (patch) | |
tree | aaa57d531c5135c971b06394a2633db14d888d51 /clang/lib/Frontend/CompilerInvocation.cpp | |
parent | addbf732c83b54259d6aa2c6ed982099be0aeeaf (diff) | |
download | llvm-6bba95831e480656124a5fbcd84f4f2a31e6c0b6.zip llvm-6bba95831e480656124a5fbcd84f4f2a31e6c0b6.tar.gz llvm-6bba95831e480656124a5fbcd84f4f2a31e6c0b6.tar.bz2 |
[X86] Change the scheduler model for 'pentium4' to SandyBridgeModel.
I meant to do this in D83913, but missed it while updating the
feature list.
Interestingly I think this is disabling the postRA scheduler. But
it does match our default 64-bit behavior.
Reviewed By: echristo
Differential Revision: https://reviews.llvm.org/D83996
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions