diff options
| author | Amara Emerson <aemerson@apple.com> | 2020-01-17 14:34:26 -0800 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2020-01-21 16:51:31 -0800 |
| commit | 67a87753225e7f5ad5b1fd151d6d2dde3d09ff09 (patch) | |
| tree | b49d7d9f4182b7e57387e25ce7285624cfb825f3 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 5fdad8e3f803adce501ca25118f325184e54018d (diff) | |
| download | llvm-67a87753225e7f5ad5b1fd151d6d2dde3d09ff09.zip llvm-67a87753225e7f5ad5b1fd151d6d2dde3d09ff09.tar.gz llvm-67a87753225e7f5ad5b1fd151d6d2dde3d09ff09.tar.bz2 | |
[AArch64] Don't generate gpr CSEL instructions in early-ifcvt if regclasses aren't compatible.
In GlobalISel we may in some unfortunate circumstances generate PHIs with
operands that are on separate banks. If-conversion doesn't currently check for
that case and ends up generating a CSEL on AArch64 with incorrect register
operands.
Differential Revision: https://reviews.llvm.org/D72961
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions