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| author | Carl Ritson <carl.ritson@amd.com> | 2024-07-20 17:26:58 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-20 17:26:58 +0900 |
| commit | 62aa596ba19af26f73c292c00d9c7f50df71d836 (patch) | |
| tree | ed3e82a8bab5a28ba5ed108c7cee6a5dc4a618fb /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | bbd4af5da2b741672a8e6f625eb12ea5c2d6220f (diff) | |
| download | llvm-62aa596ba19af26f73c292c00d9c7f50df71d836.zip llvm-62aa596ba19af26f73c292c00d9c7f50df71d836.tar.gz llvm-62aa596ba19af26f73c292c00d9c7f50df71d836.tar.bz2 | |
[AMDGPU] Add no return image_sample intrinsics and instructions (#97542)
An appropriately configured image resource descriptor can trigger
image_sample instructions to store outputs directly to a linked memory
location instead of returning to VGPRs.
This is opaque to the backend as instruction encoding is unchanged;
however, a mechanism is require to allow frontends to communicate that
these instructions do not require destination VGPRs and store to memory.
Flagging these as stores means they will not be optimized away.
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions