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| author | Paul Walker <paul.walker@arm.com> | 2019-12-13 15:03:17 +0000 |
|---|---|---|
| committer | Paul Walker <paul.walker@arm.com> | 2020-06-18 12:11:16 +0000 |
| commit | 4612f391200d0b4e21bc040a098227d73679de53 (patch) | |
| tree | ac83948bc30dab53932ef4d16b27d36df1bc56d4 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 7aad220795b50bee591cf34dfdbb030ca4d5bdc0 (diff) | |
| download | llvm-4612f391200d0b4e21bc040a098227d73679de53.zip llvm-4612f391200d0b4e21bc040a098227d73679de53.tar.gz llvm-4612f391200d0b4e21bc040a098227d73679de53.tar.bz2 | |
[SVE] Add flag to specify SVE register size, using this to calculate legal vector types.
Adds aarch64-sve-vector-bits-{min,max} to allow the size of SVE
data registers (in bits) to be specified. This allows the code
generator to make assumptions it normally couldn't. As a starting
point this information is used to mark fixed length vector types
that can fit within the specified size as legal.
Reviewers: rengolin, efriedma
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80384
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions