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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2021-03-25 10:34:34 +0000 |
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| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2021-03-25 10:34:34 +0000 |
| commit | 36e3c6c841eb7afa417fea4f3357c48cd1bf0583 (patch) | |
| tree | b05f8501f14ace0e39e9bd32351c75b17a5400fd /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 9fde88c3e21cc552af5fbb0b016fe186bad5c0f5 (diff) | |
| download | llvm-36e3c6c841eb7afa417fea4f3357c48cd1bf0583.zip llvm-36e3c6c841eb7afa417fea4f3357c48cd1bf0583.tar.gz llvm-36e3c6c841eb7afa417fea4f3357c48cd1bf0583.tar.bz2 | |
[X86][AVX] Truncate vectors with PACKSS/PACKUS on AVX2 targets
Until AVX512 we don't have any vector truncation instructions, and always lower using shuffles instead.
combineVectorTruncation performs this earlier than lowering as it makes it easier to use any sign/zero-extended bits in the truncated bits with PACKSS/PACKUS to perform the shuffle.
We currently don't attempt to use combineVectorTruncation on AVX2 targets as in the past 256-bit PACKSS/PACKUS tended to cause 128-bit lane shuffle regressions - but these should now be all resolved with combineHorizOpWithShuffle and in all cases we now reduce the amount of cross-lane shuffling and variable shuffle mask usage.
Differential Revision: https://reviews.llvm.org/D96609
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
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