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| author | Tony <Tony.Tye@amd.com> | 2020-12-19 02:05:11 +0000 |
|---|---|---|
| committer | Tony Tye <Tony.Tye@amd.com> | 2021-01-09 00:52:33 +0000 |
| commit | 2f499b9affb6797253937eb60760a7d1b60716d7 (patch) | |
| tree | 3ab9de6775d9f2294aabe22a048ced0289bdc39b /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | aab25fa7d853d6da960607310e2cd3e3a843d5a9 (diff) | |
| download | llvm-2f499b9affb6797253937eb60760a7d1b60716d7.zip llvm-2f499b9affb6797253937eb60760a7d1b60716d7.tar.gz llvm-2f499b9affb6797253937eb60760a7d1b60716d7.tar.bz2 | |
[AMDGPU] Add volatile support to SIMemoryLegalizer
Treat a non-atomic volatile load and store as a relaxed atomic at
system scope for the address spaces accessed. This will ensure all
relevant caches will be bypassed.
A volatile atomic is not changed and still only bypasses caches upto
the level specified by the SyncScope operand.
Differential Revision: https://reviews.llvm.org/D94214
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions