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| author | Kerry McLaughlin <kerry.mclaughlin@arm.com> | 2020-05-04 11:18:50 +0100 |
|---|---|---|
| committer | Kerry McLaughlin <kerry.mclaughlin@arm.com> | 2020-05-04 11:19:19 +0100 |
| commit | 19f5da9c1d698653f942b504544a73b85b1e703c (patch) | |
| tree | 281c5ff1e8a64f74209731f4e9bc65883eb16dd9 /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | e737847b8fc36b6526ad6c7ceb65d0bd07358497 (diff) | |
| download | llvm-19f5da9c1d698653f942b504544a73b85b1e703c.zip llvm-19f5da9c1d698653f942b504544a73b85b1e703c.tar.gz llvm-19f5da9c1d698653f942b504544a73b85b1e703c.tar.bz2 | |
[SVE][Codegen] Lower legal min & max operations
Summary:
This patch adds AArch64ISD nodes for [S|U]MIN_PRED
and [S|U]MAX_PRED, and lowers both SVE intrinsics and
IR operations for min and max to these nodes.
There are two forms of these instructions for SVE: a predicated
form and an immediate (unpredicated) form. The patterns
which existed for the latter have been updated to match a
predicated node with an immediate and map this
to the immediate instruction.
Reviewers: sdesmalen, efriedma, dancgr, rengolin
Reviewed By: efriedma
Subscribers: huihuiz, tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D79087
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions