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| author | Mirko Brkusanin <Mirko.Brkusanin@amd.com> | 2020-12-10 12:40:49 +0100 |
|---|---|---|
| committer | Mirko Brkusanin <Mirko.Brkusanin@amd.com> | 2020-12-10 12:40:49 +0100 |
| commit | 0c7cce54eba3249489530040f41103dd8e0049f7 (patch) | |
| tree | 54704dddd1e1a8ed4217ecc6550861575885270c /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | bedf3a0f507113bb09acaa317c533d85fe52518a (diff) | |
| download | llvm-0c7cce54eba3249489530040f41103dd8e0049f7.zip llvm-0c7cce54eba3249489530040f41103dd8e0049f7.tar.gz llvm-0c7cce54eba3249489530040f41103dd8e0049f7.tar.bz2 | |
[AMDGPU] Resolve issues when picking between ds_read/write and ds_read2/write2
Both ds_read_b128 and ds_read2_b64 are valid for 128bit 16-byte aligned
loads but the one that will be selected is determined either by the order in
tablegen or by the AddedComplexity attribute. Currently ds_read_b128 has
priority.
While ds_read2_b64 has lower alignment requirements, we cannot always
restrict ds_read_b128 to 16-byte alignment because of unaligned-access-mode
option. This was causing ds_read_b128 to be selected for 8-byte aligned
loads regardles of chosen access mode.
To resolve this we use two patterns for selecting ds_read_b128. One
requires alignment of 16-byte and the other requires
unaligned-access-mode option.
Same goes for ds_write2_b64 and ds_write_b128.
Differential Revision: https://reviews.llvm.org/D92767
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions